Electrical Performance Monitoring System

STATEMENT OF WORK Title: Electrical Performance Monitoring System I. BACKGROUND INFORMATION The National Institute of Standards and Technology (NIST) Infrastructure and Materials Group within the Engineering Laboratory is seeking an electrical analyzer and current-stress system to conduct in-situ electrical performance monitoring of advanced packaging interposer test vehicles during multi-stress accelerated reliability testing. This work is in support of the CHIPS Metrology program, specifically Grand Challenge 3, Project 10 - Reliability Testing and Modeling for Advanced Packaging. The CHIPS Metrology program develops and advances cutting edge metrology capabilities for members of the US semiconductor manufacturing ecosystem. This NIST conducted research program works with device manufacturers, tool vendors, materials suppliers, and other organizations to address critical metrology gaps to spur innovation within seven grand challenge areas. For more information on CHIPS Metrology, please visit https://www.nist.gov/chips/research-development-programs/metrology-program. II. PURPOSE The purpose of this requirement is to acquire an electrical performance monitoring system capable of generating time-resolved data necessary to populate an open-source physical property database. This system will support NIST research related to reliability of advanced packaging in heterogeneously integrated semiconductor devices. This capability directly supports the CHIPS R&D Metrology Program’s Grand Challenge focused on long-term aging studies of integrating components in advanced packaging. By providing the semiconductor industry with an accurate material property database of polymeric packaging components throughout long-term aging and a new, more accurate reliability model, long-term reliability design efficiency (both time and cost savings) will be greatly improved. Objective: This project requires a specialized system to provide controlled, accurate current for multiple test vehicles for in-situ resistance measurements during multi-stress accelerated aging tests. The system shall enable detection of failure initiation and collection of real-time degradation data necessary to characterize aging behavior in heterogeneously integrated devices. By supporting the capture of real-time resistance change data, the project aims to improve the accuracy of lifetime prediction models and support the objectives of the CHIPS Metrology Program Grand Challenge 3. III. MINIMUM REQUIREMENTS The Contractor shall provide a commercially available electrical performance monitoring system that meets all technical specifications identified below. All items must be new. Used or remanufactured equipment will not be considered for award. Experimental, prototype, or custom items will not be considered. The use of “gray market” components is not acceptable. All line -- 1 of 5 -- 2 | P a g e items shall be shipped in the original manufacturer’s packaging and include all original documentation and software, when applicable. Line Item 0001: Description: Electrical Performance Monitoring System Quantity: 1 A. Technical Specifications a. Configuration i. Complete modular DC current-stress/electrical analyzer system suitable for rack or bench operation. ii. Minimum of 8 independently programmable DC source output channels 1. Each output channel shall be independently programmable for current, voltage, compliance limits, output state, and fault response. 2. This can include multiple multi-channel mainframes (not to exceed 4). 3. Each channel shall support constant-current and constant-voltage operation iii. System must be suitable for continuous, long-duration operation with test vehicles. iv. Must include all required mainframes, source modules, standard power cords, control interfaces, factory calibration, software licenses needed for operation, and standard documentation. b. Applied current capability i. Minimum DC current capability per channel: 0 A to at least +3 A continuous. ii. System must support stable constant-current operation. iii. Current programming accuracy shall be <= 0.05 % of setpoint plus <= 500 uA. Specify current accuracy. iv. Specify current programming resolution and accuracy. v. System must support continuous DC current stressing for electromigration studies and allow automated current ramping or step changes through software control. c. Applied potential, power, and sensing capability i. Minimum voltage compliance capability of 50 V per channel ii. Minimum output power capability of 100 W per channel iii. Each channel must support four-wire remote sense for low-resistance test structures. iv. Specify voltage programming resolution and accuracy. d. In-situ monitoring and external measurement integration i. System must support integration with an existing switch/multiplexer-based digital data acquisition system for time-resolved voltage, resistance, current-shunt, and temperature monitoring. ii. System must support use of user-provided external 4-terminal precision current shunts in series with each independently stressed daisy-chain channel for independent actual-current verification. e. Samples -- 2 of 5 -- 3 | P a g e i. System will be used to measure electronic performance of solder joints (ubump (45 um diameter), TSV, C4 bump (100 um diameter)) used in 2.5D semiconductor devices. ii. Samples will be located in external environmental chambers or laboratory ovens with chamber feedthroughs. iii. Maximum intended current density is approximately 2.0 x 104 A/cm 2 f. Safety, isolation, and protection i. Each channel must provide hardware output disconnect relays or equivalent hardware isolation of force and sense leads during output-off, fault, or emergency shutdown conditions. ii. A failure or shutdown on one channel must not require shutdown of all other independent channels during a multi-channel test unless commanded by the user or required by a safety interlock. g. Software…